Booting with sub socket partitioning A Harikumar, T Thomas, BP Simon, KS Panesar US Patent 7,987,352, 2011 | 26 | 2011 |
Method, system and apparatus for handling events for partitions in a socket with sub-socket partitioning A Harikumar, T Thomas, BP Simon US Patent 8,635,380, 2014 | 17 | 2014 |
Method, apparatus, and system for shared cache usage to different partitions in a socket with sub-socket partitioning A Harikumar, T Thomas, BP Simon US Patent 8,296,522, 2012 | 11 | 2012 |
Method, system and apparatus for memory address mapping for sub-socket partitioning A Harikumar, T Thomas, BP Simon US Patent 8,151,081, 2012 | 9 | 2012 |
Method, system and apparatus for main memory access subsystem usage to different partitions in a socket with sub-socket partitioning A Harikumar, T Thomas, BP Simon US Patent 8,370,508, 2013 | 7 | 2013 |
Systems, methods, and apparatus for detecting control flow attacks K Yamada, SF Varoglu, A Harikumar, A Nayshtut US Patent 10,984,096, 2021 | 5 | 2021 |
Methods, systems and apparatus to detect polymorphic malware A Nayshtut, V Sukhomlinov, K Yamada, A Harikumar, V Gokulrangan US Patent 11,126,721, 2021 | | 2021 |
Technologies for scalable translation caching for binary translation systems K Yamada, JAB Paredes, A Sarkar, A Harikumar, J Lu US Patent 10,789,056, 2020 | | 2020 |
System, apparatus and method for performing on-demand binary analysis for detecting code reuse attacks T Ince, K Yamada, A Harikumar, A Nayshtut US Patent 10,395,033, 2019 | | 2019 |
Method, system and apparatus for handling events for partitions in a socket with sub-socket partitioning A Harikumar, T Thomas, BP Simon US Patent 8,850,081, 2014 | | 2014 |
VMM Based OS Profiler A Harikumar Birla Institute of Technology and Science, Pilani, 2007 | | 2007 |
Exploring VLSI System Architectures B Ajay Harikumar and Ashutosh Tiwari, Philips Semiconductors VLSI Design and Test Workshops 2000, 2000 | | 2000 |