| Progress and benchmark of spiking neuron devices and circuits FX Liang, IT Wang, TH Hou Advanced Intelligent Systems 3 (8), 2100007, 2021 | 30 | 2021 |
| BEOL-compatible superlattice FEFET analog synapse with improved linearity and symmetry of weight update KA Aabrar, SG Kirtania, FX Liang, J Gomez, M San Jose, Y Luo, H Ye, ... IEEE Transactions on Electron Devices 69 (4), 2094-2100, 2022 | 29 | 2022 |
| Compact probabilistic Poisson neuron based on back-hopping oscillation in STT-MRAM for all-spin deep spiking neural network MH Wu, MS Huang, Z Zhu, FX Liang, MC Hong, J Deng, JH Wei, SS Sheu, ... 2020 IEEE Symposium on VLSI Technology, 1-2, 2020 | 15 | 2020 |
| NVMLearn: a simulation platform for non-volatile-memory-based deep learning hardware DD Lu, FX Liang, YC Wang, HK Zeng 2017 International Conference on Applied System Innovation (ICASI), 66-69, 2017 | 8 | 2017 |
| Gate-stack engineered IGZO-based multi-bit OTP FeTFT with lifelong retention for inference engine applications S De, S Thunder, D Lehninger, HH Le, Y Raffel, M Lederer, F Müller, ... TechRxiv. Preprint. https://doi. org/10.36227/techrxiv 19491221, v2, 2022 | 5 | 2022 |
| Stochastic STT-MRAM spiking neuron circuit FX Liang, P Sahu, MH Wu, JH Wei, SS Sheu, TH Hou 2020 International Symposium on VLSI Technology, Systems and Applications …, 2020 | 4 | 2020 |
| Compact device models for FinFET and beyond DD Lu, MV Dunga, AM Niknejad, C Hu, FX Liang, WC Hung, JW Lee, ... arXiv preprint arXiv:2005.02580, 2020 | 4 | 2020 |
| CIMulator: a comprehensive simulation platform for computing-in-memory circuit macros with low bit-width and real memory materials HH Le, MA Baig, WC Hong, CH Tsai, CJ Yeh, FX Liang, I Huang, WT Tsai, ... arXiv preprint arXiv:2306.14649, 2023 | 1 | 2023 |
