| Speeding-up SIMD instructions dynamic binary translation in embedded processor simulation L Michel, N Fournel, F Pétrot Design, Automation & Test in Europe Conference & Exhibition (DATE), 2011, 1-4, 2011 | 29 | 2011 |
| Automated generation of efficient instruction decoders for instruction set simulators N Fournel, L Michel, F Pétrot Proceedings of the International Conference on Computer-Aided Design, 739-746, 2013 | 11 | 2013 |
| Fast simulation of systems embedding VLIW processors L Michel, N Fournel, F Pétrot Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware …, 2012 | 10 | 2012 |
| Dynamic Binary Translation of VLIW Codes on Scalar Architectures L Michel, F Pétrot IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017 | 2 | 2017 |
| Contributions à la traduction binaire dynamique: support du parallélisme d'instructions et génération de traducteurs optimisés L Michel Université de Grenoble, 2014 | 2 | 2014 |
| QEmu TCG Enhancements for Speeding-up the Emulation of SIMD instructions L Michel, N Fournel, F Pétrot 1 st International QEMU Users' Forum, 39, 2011 | 2 | 2011 |
| Multiprocessor System-on-Chip Prototyping Using Dynamic Binary Translation F Pétrot, L Michel, C Deschamps Handbook of Hardware/Software Codesign, 565-591, 2017 | 1 | 2017 |
| Advanced Virtual Prototyping of Multiprocessor Systems on Chip F Pétrot, N Fournel, MM Hamayun, L Michel | | 2012 |
