| A real-time object detection accelerator with compressed SSDLite on FPGA H Fan, S Liu, M Ferianc, HC Ng, Z Que, S Liu, X Niu, W Luk 2018 International conference on field-programmable technology (FPT), 14-21, 2018 | 66 | 2018 |
| Optimizing CNN-based segmentation with deeply customized convolutional and deconvolutional architectures on FPGA S Liu, H Fan, X Niu, H Ng, Y Chu, W Luk ACM Transactions on Reconfigurable Technology and Systems (TRETS) 11 (3), 1-22, 2018 | 59 | 2018 |
| Towards efficient deep neural network training by FPGA-based batch-level parallelism C Luo, MK Sit, H Fan, S Liu, W Luk, C Guo Journal of Semiconductors 41 (2), 022403, 2020 | 44 | 2020 |
| F-E3D: FPGA-based acceleration of an efficient 3D convolutional neural network for human action recognition H Fan, C Luo, C Zeng, M Ferianc, Z Que, S Liu, X Niu, W Luk 2019 IEEE 30th international conference on Application-specific Systems …, 2019 | 42 | 2019 |
| F-C3D: FPGA-based 3-dimensional convolutional neural network H Fan, X Niu, Q Liu, W Luk 2017 27th International Conference on Field Programmable Logic and …, 2017 | 33 | 2017 |
| Reconfigurable acceleration of 3D-CNNs for human action recognition with block floating-point representation H Fan, HC Ng, S Liu, Z Que, X Niu, W Luk 2018 28th International Conference on Field Programmable Logic and …, 2018 | 26 | 2018 |
| Mapping large LSTMs to FPGAs with weight reuse Z Que, Y Zhu, H Fan, J Meng, X Niu, W Luk Journal of Signal Processing Systems 92, 965-979, 2020 | 25 | 2020 |
| Optimizing reconfigurable recurrent neural networks Z Que, H Nakahara, E Nurvitadhi, H Fan, C Zeng, J Meng, X Niu, W Luk 2020 IEEE 28th Annual International Symposium on Field-Programmable Custom …, 2020 | 21 | 2020 |
| Improving performance estimation for FPGA-based accelerators for convolutional neural networks M Ferianc, H Fan, RSW Chu, J Stano, W Luk Applied Reconfigurable Computing. Architectures, Tools, and Applications …, 2020 | 18 | 2020 |
| Memory-efficient architecture for accelerating generative networks on FPGA S Liu, C Zeng, H Fan, HC Ng, J Meng, Z Que, X Niu, W Luk 2018 International Conference on Field-Programmable Technology (FPT), 30-37, 2018 | 17 | 2018 |
| High-Performance FPGA-based Accelerator for Bayesian Neural Networks H Fan, M Ferianc, M Rodrigues, H Zhou, X Niu, W Luk Proceedings of the 58th ACM/IEEE Design Automation Conference (DAC'21), 2021 | 16 | 2021 |
| Adaptable Butterfly Accelerator for Attention-based NNs via Hardware and Algorithm Co-design H Fan, T Chau, SI Venieris, R Lee, A Kouris, W Luk, ND Lane, ... 2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO), 599-615, 2022 | 12 | 2022 |
| Optimizing FPGA-based CNN accelerator using differentiable neural architecture search H Fan, M Ferianc, S Liu, Z Que, X Niu, W Luk 2020 IEEE 38th International Conference on Computer Design (ICCD), 465-468, 2020 | 11 | 2020 |
| Static block floating-point quantization for convolutional neural networks on FPGA H Fan, G Wang, M Ferianc, X Niu, W Luk 2019 International Conference on Field-Programmable Technology (ICFPT), 28-35, 2019 | 10 | 2019 |
| Recurrent neural networks with column-wise matrix–vector multiplication on FPGAs Z Que, H Nakahara, E Nurvitadhi, A Boutros, H Fan, C Zeng, J Meng, ... IEEE Transactions on Very Large Scale Integration (VLSI) Systems 30 (2), 227-237, 2021 | 9 | 2021 |
| Toward full-stack acceleration of deep convolutional neural networks on FPGAs S Liu, H Fan, M Ferianc, X Niu, H Shi, W Luk IEEE Transactions on Neural Networks and Learning Systems 33 (8), 3974-3987, 2021 | 9 | 2021 |
| A reconfigurable multithreaded accelerator for recurrent neural networks Z Que, H Nakahara, H Fan, J Meng, KH Tsoi, X Niu, E Nurvitadhi, W Luk 2020 International Conference on Field-Programmable Technology (ICFPT), 20-28, 2020 | 9 | 2020 |
| Algorithm and Hardware Co-design for Reconfigurable CNN Accelerator H Fan, M Ferianc, Z Que, H Li, S Liu, X Niu, W Luk ASP-DAC'22, 2021 | 7 | 2021 |
| FPGA-based Acceleration for Bayesian Convolutional Neural Networks H Fan, M Ferianc, Z Que, S Liu, X Niu, M Rodrigues, W Luk IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2022 | 6 | 2022 |
| Improving performance estimation for design space exploration for convolutional neural network accelerators M Ferianc, H Fan, D Manocha, H Zhou, S Liu, X Niu, W Luk Electronics 10 (4), 520, 2021 | 6 | 2021 |
Wayne LukProfessor of Computer Engineering, Imperial College LondonVerified email at imperial.ac.uk
