Mahmut Kandemir
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Leakage current: Moore's law meets static power
NS Kim, T Austin, D Baauw, T Mudge, K Flautner, JS Hu, MJ Irwin, ...
computer 36 (12), 68-75, 2003
The design and use of SimplePower: A cycle-accurate energy estimation tool
W Ye, N Vijaykrishnan, M Kandemir, MJ Irwin
Proceedings of the 37th Annual Design Automation Conference, 340-345, 2000
Evaluating STT-RAM as an energy-efficient main memory alternative
E Kültürsay, M Kandemir, A Sivasubramaniam, O Mutlu
2013 IEEE International Symposium on Performance Analysis of Systems and …, 2013
DRPM: dynamic speed control for power management in server class disks
S Gurumurthi, A Sivasubramaniam, M Kandemir, H Franke
30th Annual International Symposium on Computer Architecture, 2003 …, 2003
Design and management of 3D chip multiprocessors using network-in-memory
F Li, C Nicopoulos, T Richardson, Y Xie, V Narayanan, M Kandemir
33rd International Symposium on Computer Architecture (ISCA'06), 130-141, 2006
Dynamic management of scratch-pad memory space
M Kandemir, J Ramanujam, MJ Irwin, N Vijaykrishnan, I Kadayif, A Parikh
Proceedings of the 38th Design Automation Conference (IEEE Cat. No …, 2001
Energy-driven integrated hardware-software optimizations using SimplePower
N Vijaykrishnan, M Kandemir, MJ Irwin, HS Kim, W Ye
ACM SIGARCH Computer Architecture News 28 (2), 95-106, 2000
OWL: cooperative thread array aware scheduling techniques for improving GPGPU performance
A Jog, O Kayiran, N Chidambaram Nachiappan, AK Mishra, MT Kandemir, ...
ACM SIGPLAN Notices 48 (4), 395-406, 2013
Reducing memory interference in multicore systems via application-aware memory channel partitioning
SP Muralidhara, L Subramanian, O Mutlu, M Kandemir, T Moscibroda
2011 44th Annual IEEE/ACM International Symposium on Microarchitecture …, 2011
Neither more nor less: Optimizing thread-level parallelism for GPGPUs
O Kayıran, A Jog, MT Kandemir, CR Das
Proceedings of the 22nd international conference on Parallel architectures …, 2013
Fault tolerant algorithms for network-on-chip interconnect
M Pirretti, GM Link, RR Brooks, N Vijaykrishnan, M Kandemir, MJ Irwin
IEEE computer society annual symposium on VLSI, 46-51, 2004
Using complete machine simulation for software power estimation: The softwatt approach
S Gurumurthi, A Sivasubramaniam, MJ Irwin, N Vijaykrishnan, ...
Proceedings Eighth International Symposium on High Performance Computer …, 2002
Reducing leakage energy in FPGAs using region-constrained placement
A Gayasen, Y Tsai, N Vijaykrishnan, M Kandemir, MJ Irwin, T Tuan
Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field …, 2004
DRAM energy management using software and hardware directed power mode control
V Delaluz, M Kandemir, N Vijaykrishnan, A Sivasubramaniam, MJ Irwin
Proceedings HPCA Seventh International Symposium on High-Performance …, 2001
Organizing the last line of defense before hitting the memory wall for CMPs
C Liu, A Sivasubramaniam, M Kandemir
10th International Symposium on High Performance Computer Architecture (HPCA …, 2004
Orchestrated scheduling and prefetching for GPGPUs
A Jog, O Kayiran, AK Mishra, MT Kandemir, O Mutlu, R Iyer, CR Das
Proceedings of the 40th Annual International Symposium on Computer …, 2013
Scheduler-based DRAM energy management
V Delaluz, A Sivasubramaniam, M Kandemir, N Vijaykrishnan, MJ Irwin
Proceedings 2002 Design Automation Conference (IEEE Cat. No. 02CH37324), 697-702, 2002
Influence of compiler optimizations on system power
M Kandemir, N Vijaykrishnan, MJ Irwin, W Ye
Proceedings of the 37th Annual Design Automation Conference, 304-307, 2000
Compiler-directed scratch pad memory hierarchy design and management
M Kandemir, A Choudhary
Proceedings 2002 Design Automation Conference (IEEE Cat. No. 02CH37324), 628-633, 2002
On the detection of clones in sensor networks using random key predistribution
R Brooks, PY Govindaraju, M Pirretti, N Vijaykrishnan, MT Kandemir
IEEE Transactions on Systems, Man, and Cybernetics, Part C (Applications and …, 2007
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