| 8.1 a 224Gb/s DAC-based PAM-4 transmitter with 8-tap FFE in 10nm CMOS J Kim, S Kundu, A Balankutty, M Beach, BC Kim, S Kim, Y Liu, SK Murthy, ... 2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 126-128, 2021 | 57 | 2021 |
| A 224-Gb/s DAC-based PAM-4 quarter-rate transmitter with 8-tap FFE in 10-nm FinFET J Kim, S Kundu, A Balankutty, M Beach, BC Kim, ST Kim, Y Liu, SK Murthy, ... IEEE Journal of Solid-State Circuits 57 (1), 6-20, 2021 | 30 | 2021 |
| 11.5 A 23.9-to-29.4 GHz Digital LC-PLL with a Coupled Frequency Doubler for Wireline Applications in 10nm FinFET D Shin, HS Kim, C Liu, P Wali, SK Murthy, Y Fan 2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 188-190, 2021 | 12 | 2021 |
| A 56GHz receiver analog front end for 224Gb/s PAM-4 SerDes in 10nm CMOS S Kiran, A Balankutty, Y Liu, R Dokania, H Venkataraman, P Wali, S Kim, ... 2021 Symposium on VLSI Circuits, 1-2, 2021 | 10 | 2021 |
| A Fractional-N Digital LC-PLL Using Coupled Frequency Doubler With Frequency-Tracking Loop for Wireline Applications D Shin, HS Kim, CC Liu, P Wali, SK Murthy, Y Fan IEEE Journal of Solid-State Circuits 57 (6), 1736-1748, 2021 | 5 | 2021 |
| SPECIAL SECTION ON THE 2021 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE (ISSCC) A Amirkhany, T Karnik, S Das, J Deguchi, Y Taito, J Kim, S Kundu, ... | | |
Dongseok ShinNvidiaVerified email at vt.edu
