| Leveraging optical technology in future bus-based chip multiprocessors N Kirman, M Kirman, RK Dokania, JF Martinez, AB Apsel, MA Watkins, ... 2006 39th Annual IEEE/ACM International Symposium on Microarchitecture …, 2006 | 404 | 2006 |
| Wide temperature range operation of micrometer-scale silicon electro-optic modulators S Manipatruni, RK Dokania, B Schmidt, N Sherwood-Droz, CB Poitras, ... Optics letters 33 (19), 2185-2187, 2008 | 152 | 2008 |
| High-density low voltage non-volatile memory with unidirectional plate-line and bit-line and pillar capacitor S Manipatruni, RK Dokania, R Ramesh US Patent 11,476,260, 2022 | 93 | 2022 |
| A low power impulse radio design for body-area-networks RK Dokania, XY Wang, SG Tallur, AB Apsel IEEE Transactions on Circuits and Systems I: Regular Papers 58 (7), 1458-1469, 2011 | 83 | 2011 |
| Analysis of challenges for on-chip optical interconnects RK Dokania, AB Apsel Proceedings of the 19th ACM Great Lakes symposium on VLSI, 275-280, 2009 | 78 | 2009 |
| A 112 Gb/s PAM-4 56 Gb/s NRZ reconfigurable transmitter with three-tap FFE in 10-nm FinFET J Kim, A Balankutty, RK Dokania, A Elshazly, HS Kim, S Kundu, D Shi, ... IEEE Journal of Solid-State Circuits 54 (1), 29-42, 2018 | 77 | 2018 |
| A 112Gb/s PAM-4 transmitter with 3-Tap FFE in 10nm CMOS J Kim, A Balankutty, R Dokania, A Elshazly, HS Kim, S Kundu, S Weaver, ... 2018 IEEE International Solid-State Circuits Conference-(ISSCC), 102-104, 2018 | 72 | 2018 |
| Artificial intelligence processor with three-dimensional stacked memory S Manipatruni, RK Dokania, A Mathuriya, R Ramesh US Patent 11,139,270, 2021 | 69 | 2021 |
| An ultralow-power dual-band UWB impulse radio R Dokania, X Wang, S Tallur, C Dorta-Quinones, A Apsel IEEE Transactions on Circuits and Systems II: Express Briefs 57 (7), 541-545, 2010 | 65 | 2010 |
| Cancellation of load regulation in low drop-out regulators RK Dokania, GA Rincón-Mora Electronics Letters 38 (22), 1300-1302, 2002 | 63 | 2002 |
| 10.5 A 5.9 pJ/b 10Gb/s serial link with unequalized MM-CDR in 14nm tri-gate CMOS R Dokania, A Kern, M He, A Faust, R Tseng, S Weaver, K Yu, C Bil, ... 2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of …, 2015 | 60 | 2015 |
| On-chip optical technology in future bus-based multicore designs N Kirman, M Kirman, RK Dokania, JF Martinez, AB Apsel, MA Watkins, ... IEEE micro 27 (1), 56-66, 2007 | 60 | 2007 |
| Integration method of ferroelectric memory array G Thareja, S Manipatruni, RK Dokania, R Ramesh, A Mathuriya US Patent 11,289,497, 2022 | 54 | 2022 |
| Artificial intelligence processor with three-dimensional stacked memory S Manipatruni, RK Dokania, A Mathuriya, R Ramesh US Patent 11,171,115, 2021 | 53 | 2021 |
| PCO-based synchronization for cognitive duty-cycled impulse radio sensor networks XY Wang, RK Dokania, A Apsel IEEE Sensors Journal 11 (3), 555-564, 2010 | 53 | 2010 |
| Ferroelectric capacitor and method of patterning such G Thareja, S Manipatruni, RK Dokania, R Ramesh, A Mathuriya US Patent 11,430,861, 2022 | 45 | 2022 |
| High-density low voltage non-volatile differential memory bit-cell with shared plate line S Manipatruni, RK Dokania, R Ramesh US Patent 10,847,201, 2020 | 44 | 2020 |
| Pulsing scheme for a ferroelectric memory bit-cell to minimize read or write disturb effect and refresh logic RK Dokania, A Mathuriya, S Manipatruni US Patent 11,482,270, 2022 | 42 | 2022 |
| Low power ferroelectric based majority logic gate adder S Manipatruni, YS Fang, R Menezes, RK Dokania, G Thareja, R Ramesh, ... US Patent 10,944,404, 2021 | 41 | 2021 |
| Low power ferroelectric based majority logic gate carry propagate and serial adder S Manipatruni, YS Fang, R Menezes, RK Dokania, G Thareja, R Ramesh, ... US Patent 11,283,453, 2022 | 39 | 2022 |
Sasi ManipatruniKepler/Intel/CornellVerified email at cornell.edu
