| Semiconductor integrated circuit device including electrostatic protection circuit accommodating drive by plurality of power supplies and effectively removing various types of … T Nakura, K Ueda US Patent 6,208,494, 2001 | 75 | 2001 |
| Time difference amplifier with robust gain using closed-loop control T Nakura, S Mandai, M Ikeda, K Asada IEICE transactions on electronics 93 (3), 303-308, 2010 | 66 | 2010 |
| Fine-grain redundant logic using defect-prediction flip-flops T Nakura, K Nose, M Mizuno 2007 IEEE International Solid-State Circuits Conference. Digest of Technical …, 2007 | 63 | 2007 |
| A 16-bit 2.0-ps Resolution Two-Step TDC in 0.18- m CMOS Utilizing Pulse-Shrinking Fine Stage With Built-In Coarse Gain Calibration R Enomoto, T Iizuka, T Koga, T Nakura, K Asada IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 (1), 11-19, 2018 | 35 | 2018 |
| Fast operating multiplexer T Nakura, K Ueda US Patent 6,477,186, 2002 | 34 | 2002 |
| LAPAREX-An automatic parameter extraction program for gain-and index-coupled distributed feedback semiconductor lasers, and its application to observation of changing coupling … T NAKURA, Y NAKANO IEICE transactions on electronics 83 (3), 488-495, 2000 | 34 | 2000 |
| Cascaded time difference amplifier using differential logic delay cell S Mandai, T Nakura, M Ikeda, K Asada 2009 International SoC Design Conference (ISOCC), 194-197, 2009 | 27 | 2009 |
| Time-domain approach for analog circuits in deep sub-micron LSI K Asada, T Nakura, T Iizuka, M Ikeda IEICE Electronics Express 15 (6), 20182001-20182001, 2018 | 25 | 2018 |
| All-digital on-chip monitor for PMOS and NMOS process variability measurement utilizing buffer ring with pulse counter T Iizuka, J Jeong, T Nakura, M Ikeda, K Asada 2010 Proceedings of ESSCIRC, 182-185, 2010 | 25 | 2010 |
| Time-to-digital converter based on time difference amplifier with non-linearity calibration S Mandai, T Iizuka, T Nakura, M Ikeda, K Asada 2010 Proceedings of ESSCIRC, 266-269, 2010 | 24 | 2010 |
| Ring oscillator based random number generator utilizing wake-up time uncertainty T Nakura, M Ikeda, K Asada 2009 IEEE Asian Solid-State Circuits Conference, 121-124, 2009 | 20 | 2009 |
| A fine-resolution pulse-shrinking time-to-digital converter with completion detection utilizing built-in offset pulse T Iizuka, T Koga, T Nakura, K Asada 2016 IEEE Asian Solid-State Circuits Conference (A-SSCC), 313-316, 2016 | 19 | 2016 |
| Feedforward active substrate noise cancelling technique using power supply di/dt detector T Nakura, M Ikeda, K Asada Digest of Technical Papers. 2005 Symposium on VLSI Circuits, 2005., 284-287, 2005 | 19 | 2005 |
| A 3.6-Gb/s 340-mW 16: 1 pipe-lined multiplexer using 0.18/spl mu/m SOI-CMOS technology T Nakura, K Ueda, K Kubo, Y Matsuda, K Mashiko, T Yoshihara IEEE Journal of Solid-State Circuits 35 (5), 751-756, 2000 | 18 | 2000 |
| Buffer-ring-based all-digital on-chip monitor for PMOS and NMOS process variability and aging effects T Iizuka, T Nakura, K Asada 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and …, 2010 | 16 | 2010 |
| Low pass filter-less pulse width controlled PLL using time to soft thermometer code converter T Nakura, K Asada IEICE transactions on electronics 95 (2), 297-302, 2012 | 15 | 2012 |
| Fault detection of VLSI power supply network based on current estimation from surface magnetic field D Takahashi, T Iizuka, NN Mai-Khanh, T Nakura, K Asada IEEE Transactions on Instrumentation and Measurement 68 (7), 2519-2530, 2018 | 14 | 2018 |
| Power supply di/dt measurement using on-chip di/dt detector circuit T Nakura, M Ikeda, K Asada 2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No …, 2004 | 14 | 2004 |
| Synchronous frequency dividing circuit T Nakura, K Ueda US Patent 6,249,157, 2001 | 13 | 2001 |
| Light detection and ranging (LIDAR) laser altimeter for the Martian Moons Exploration (MMX) spacecraft H Senshu, T Mizuno, K Umetani, T Nakura, A Konishi, A Ogawa, H Ikeda, ... Earth, Planets and Space 73, 1-6, 2021 | 12 | 2021 |
