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Naftali E. Lustig
Naftali E. Lustig
IBM Systems and Technology
Verified email at us.ibm.com
Title
Cited by
Cited by
Year
Full copper wiring in a sub-0.25/spl mu/m CMOS ULSI technology
D Edelstein, J Heidenreich, R Goldblatt, W Cote, C Uzoh, N Lustig, ...
International Electron Devices Meeting. IEDM Technical Digest, 773-776, 1997
6731997
In-situ endpoint detection and process monitoring method and apparatus for chemical-mechanical polishing
NE Lustig, KL Saenger, HM Tong
US Patent 5,433,651, 1995
5191995
Diamond-like carbon films from a hydrocarbon helium plasma
FD Bailey, DA Buchanan, AC Callegari, HM Clearfield, FE Doany, ...
US Patent 5,470,661, 1995
3081995
Chip to wiring interface with single metal alloy layer applied to surface of copper interconnect
CJ Sambucetti, X Chen, SC Seo, BN Agarwala, CK Hu, NE Lustig, ...
US Patent 6,573,606, 2003
3052003
Planar copperpolyimide back end of the line interconnections for ULSI devices
G B. Luther, White, Uzoh, Cacouris, Lustig
VLSI Multilevel Interconnection Conference 1993 (VMIC), 15-21, 1993
226*1993
Gate dielectric and contact effects in hydrogenated amorphous silicon‐silicon nitride thin‐film transistors
N Lustig, J Kanicki
Journal of Applied Physics 65 (10), 3951-3957, 1989
1631989
In-situ endpoint detection method and apparatus for chemical-mechanical polishing using low amplitude input voltage
NE Lustig, RM Feenstra, WL Guthrie
US Patent 5,337,015, 1994
1371994
High performance 45-nm SOI technology with enhanced strain, porous low-k BEOL, and immersion lithography
P Agnello, T Ivers, C Warm, R Wise, R Wachnik, D Schepis, S Sankaran, ...
2006 International Electron Devices Meeting, 1-4, 2006
1332006
22nm High-performance SOI technology featuring dual-embedded stressors, Epi-Plate High-K deep-trench embedded DRAM and self-aligned Via 15LM BEOL
S Narasimha, P Chang, C Ortolland, D Fried, E Engbrecht, K Nummy, ...
2012 International Electron Devices Meeting, 3.3. 1-3.3. 4, 2012
1032012
Elimination of photo-induced electrochemical dissolution in chemical mechanical polishing
DC Edelstein, WJ Horkans, SE Luce, NE Lustig, KR Pope, PD Roper
US Patent 6,153,043, 2000
982000
Method and apparatus for in-line oxide thickness determination in chemical-mechanical polishing
NE Lustig, WL Guthrie, TE Sandwick
US Patent 6,020,264, 2000
872000
IEEE Int. Electron Devices Meeting Digest
D Edelstein, J Heidenreich, R Goldblatt, W Cote, C Uzoh, N Lustig, ...
IEEE, 1997
851997
A high performance 0.13/spl mu/m copper BEOL technology with low-k dielectric
RD Goldblatt, B Agarwala, MB Anand, EP Barth, GA Biery, ZG Chen, ...
Proceedings of the IEEE 2000 International Interconnect Technology …, 2000
692000
Chemical-mechanical planarization of barriers or liners for copper metallurgy
WJ Cote, DC Edelstein, NE Lustig
US Patent 6,375,693, 2002
652002
First microprocessors with immersion lithography
D Gil, T Bailey, D Corliss, MJ Brodsky, P Lawson, M Rutten, Z Chen, ...
Optical Microlithography XVIII 5754, 119-128, 2005
632005
Silicon containing polymer in applications for 193-nm high-NA lithography processes
S Burns, D Pfeiffer, A Mahorowala, K Petrillo, A Clancy, K Babich, ...
Advances in Resist Technology and Processing XXIII 6153, 201-212, 2006
492006
Chemical-mechanical planarization of metallurgy
V Brusic, DC Edelstein, PM Feeney, W Guthrie, M Jaso, FB Kaufman, ...
US Patent 6,632,377, 2003
372003
Interconnect structure for integrated circuits having enhanced electromigration resistance
G Bonilla, K Chanda, RG Filippi, S Grunow, CK Hu, NE Lustig, AH Simon, ...
US Patent 8,232,646, 2012
362012
Disorder-induced Raman scattering in NiSi 2
F Li, N Lustig, P Klosowski, JS Lannin
Physical Review B 41 (14), 10210, 1990
351990
A 45 nm CMOS node Cu/Low-k/Ultra Low-k PECVD SiCOH (k= 2.4) BEOL technology
S Sankaran, S Arai, R Augur, M Beck, G Biery, T Bolom, G Bonilla, ...
2006 International Electron Devices Meeting, 1-4, 2006
312006
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