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Marcio Monteiro
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Energy-Efficient Hadamard-Based SATD Hardware Architectures Through Calculation Reuse
I Seidel, M Monteiro, B Bonotto, LV Agostini, JL Güntzel
IEEE Transactions on Circuits and Systems I: Regular Papers 66 (6), 2102-2115, 2019
132019
Exploring pel decimation to trade off between energy and quality in video coding
I Seidel, AB Bräscher, M Monteiro, JL Giintzel
2014 IEEE 5th Latin American Symposium on Circuits and Systems, 1-4, 2014
62014
Design of Energy-efficient Gaussian Filters by Combining Refactoring and Approximate Adders
M Monteiro, P Aquino, I Seidel, M Grellert, L Soares, JL Güntzel, ...
2021 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2021
42021
Standalone Rate-Distortion FME Architecture
V Rodrigues Filho, M Monteiro, I Seidel, M Grellert, JL Güntzel
2020 33rd Symposium on Integrated Circuits and Systems Design (SBCCI), 1-6, 2020
42020
Squarer exploration for energy-efficient sum of squared differences
I Seidel, M Monteiro, JL Güntzel, L Agostini
2016 IEEE 7th Latin American Symposium on Circuits & Systems (LASCAS), 327-330, 2016
42016
Exploring the Impacts of Multiple Kernel Sizes of Gaussian Filters Combined to Approximate Computing in Canny Edge Detection
M Monteiro, I Seidel, M Grellert, JL Güntzel, L Soares, C Meinhardt
2022 IEEE 13th Latin America Symposium on Circuits and System (LASCAS), 1-4, 2022
22022
Hardware-Friendly Search Patterns for the Versatile Video Coding Fractional Motion Estimation
V Rodrigues Filho, M Monteiro, I Seidel, M Grellert, JL Güntzel
2021 IEEE 23rd International Workshop on Multimedia Signal Processing (MMSP …, 2021
22021
On the calculation reuse in Hadamard-based SATD
M Monteiro, I Seidel, JL Güntzel
2018 IEEE 9th Latin American Symposium on Circuits & Systems (LASCAS), 1-4, 2018
22018
Towards optimal use of pel decimation to trade off quality for energy
I Seidel, AB Braescher, M Monteiro, JL Guentzel
Analog Integrated Circuits and Signal Processing 85 (1), 107-128, 2015
12015
A Design Space Exploration of Power-efficient Gaussian Filter Architectures using Logical Optimization and Approximated Adders
M Monteiro, I Seidel, JL Güntzel, M Grellert, L Soares, C Meinhardt
Journal of Integrated Circuits and Systems 18 (2), 1-12, 2023
2023
Low-Energy and Reduced-Area Hardware Architecture for the Versatile Video Coding FME
V Rodrigues Filho, I Seidel, N Citadin, M Monteiro, M Grellert, JL Güntzel
2023 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems …, 2023
2023
Arquitetura energeticamente eficiente para a estimação de movimento fracionária: uma nova abordagem para o cálculo de resíduos
M Monteiro
2020
Arquitetura energeticamente eficiente para cálculo da SATD através do reúso de dados
M Monteiro
Florianópolis, SC., 2017
2017
Analysis of Pel Decimation and Technology Choices to Reduce Energy on SAD Calculation
I Seidel, AB Bräscher, BG de Moraes, M Monteiro, JL Güntzel
Journal of Integrated Circuits and Systems 9 (1), 48-59, 2014
2014
Area and Energy Evaluation of an FME Hardware Architecture for HEVC and VVC Encoders
N Citadin, V Rodrigues Filho, I Seidel, M Monteiro, M Grellert, JL Güntzel
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