Jerry R. Burch
Jerry R. Burch
Synopsys, Inc.
Verified email at fun-journey.com
Title
Cited by
Cited by
Year
Symbolic model checking: 1020 states and beyond
JR Burch, EM Clarke, KL McMillan, DL Dill, LJ Hwang
Information and computation 98 (2), 142-170, 1992
42071992
Symbolic model checking for sequential circuit verification
JR Burch, EM Clarke, DE Long, KL McMillan, DL Dill
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1994
8021994
Automatic verification of pipelined microprocessor control
JR Burch, DL Dill
International Conference on Computer Aided Verification, 68-80, 1994
7391994
Sequential circuit verification using symbolic model checking
JR Burch, EM Clarke, KL McMillan, DL Dill
27th ACM/IEEE Design Automation Conference, 46-51, 1990
6681990
Symbolic model checking with partitioned transition relations
JR Burch, EM Clarke, DE Long
Carnegie-Mellon University. Department of Computer Science, 1991
4271991
Representing circuits more efficiently in symbolic model checking
JR Burch, EM Clarke, DE Long
Proceedings of the 28th ACM/IEEE Design Automation Conference, 403-407, 1991
2611991
Techniques for verifying superscalar microprocessors
JR Burch
33rd Design Automation Conference Proceedings, 1996, 552-557, 1996
1501996
Efficient validity checking for processor verification
RB Jones, DL Dill, JR Burch
Proceedings of IEEE International Conference on Computer Aided Design (ICCAD …, 1995
1311995
Automatic verification of sequential control systems using temporal logic
I Moon, GJ Powers, JR Burch, EM Clarke
AIChE Journal 38 (1), 67-75, 1992
1251992
Tight integration of combinational verification methods
JR Burch, V Singhal
1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of …, 1998
1221998
Efficient Boolean function matching
JR Burch, DE Long
ICCAD 92, 408-411, 1992
931992
Using BDDs to verify multipliers
JR Burch
Proceedings of the 28th ACM/IEEE Design Automation Conference, 408-412, 1991
911991
Trace algebra for automatic verification of real-time concurrent systems
JR Burch
CARNEGIE-MELLON UNIV PITTSBURGH PA SCHOOL OF COMPUTER SCIENCE, 1992
871992
Safe BDD minimization using don't cares
Y Hong, PA Beerel, JR Burch, KL McMillan
Proceedings of the 34th annual Design Automation Conference, 208-213, 1997
831997
Using simulation and satisfiability to compute flexibilities in Boolean networks
A Mishchenko, JS Zhang, S Sinha, JR Burch, R Brayton, ...
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2006
622006
Overcoming heterophobia: Modeling concurrency in heterogeneous systems
J Burch, R Passerone, AL Sangiovanni-Vincentelli
Proceedings Second International Conference on Application of Concurrency to …, 2001
542001
Constraints specification at higher levels of abstraction
F Balarin, J Burch, L Lavagno, Y Watanabe, R Passerone, ...
Sixth IEEE International High-Level Design Validation and Test Workshop, 129-133, 2001
482001
Robust latch mapping for combinational equivalence checking
JR Burch, V Singhal
1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of …, 1998
471998
Mechanically checking a lemma used in an automatic verification tool
PJ Windley, JR Burch
International Conference on Formal Methods in Computer-Aided Design, 362-376, 1996
461996
Automatic verification of sequential circuit designs
EM Clarke, JR Burch, O Grumberg, DE Long, KL McMillan
Philosophical Transactions of the Royal Society of London. Series A …, 1992
391992
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