Kanad Basu
Kanad Basu
Verified email at utdallas.edu - Homepage
Title
Cited by
Cited by
Year
Lossless data compression and real-time decompression
P Mishra, SW Seong, K Basu, W Wang, X Qin, C Murthy
US Patent App. 12/682,808, 2010
1372010
Processor description languages
P Mishra, N Dutt
Elsevier, 2011
1342011
RATS: Restoration-aware trace signal selection for post-silicon validation
K Basu, P Mishra
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 21 (4), 605-613, 2013
732013
Test data compression using efficient bitmask and dictionary selection methods
K Basu, P Mishra
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 18 (9 …, 2010
732010
Efficient trace signal selection for post silicon validation and debug
K Basu, P Mishra
2011 24th Internatioal Conference on VLSI Design, 352-357, 2011
652011
Analyzing and Mitigating the Impact of Permanent Faults on a Systolic Array Based Neural Network Accelerator
J Zhang, T Gu, K Basu, S Garg
arXiv preprint arXiv:1802.04657, 2018
322018
Efficient combination of trace and scan signals for post silicon validation and debug
K Basu, P Mishra, P Patra
2011 IEEE International Test Conference, 1-8, 2011
322011
Efficient trace data compression using statically selected dictionary
K Basu, P Mishra
29th VLSI Test Symposium, 14-19, 2011
242011
NIST Post-Quantum CryptographyA Hardware Evaluation Study
K Basu, D Soni, M Nabeel, R Karri
https://eprint.iacr.org/2019/047.pdf, 2019
192019
Dynamic selection of trace signals for post-silicon debug
K Basu, P Mishra, P Patra, A Nahir, A Adir
2013 14th International Workshop on Microprocessor Test and Verification, 62-67, 2013
192013
A novel test-data compression technique using application-aware bitmask and dictionary selection methods
K Basu, P Mishra
Proceedings of the 18th ACM Great Lakes symposium on VLSI, 83-88, 2008
152008
CAD-Base: An Attack Vector into the Electronics Supply Chain.
K Basu, S Saeed, C Pilato, M Ashraf, M Nabeel, ...
ACM Transactions on Design Automation of Embedded Systems, 2019
132019
Observability-aware directed test generation for soft errors and crosstalk faults
K Basu, P Mishra, P Patra
2013 26th International Conference on VLSI Design and 2013 12th …, 2013
102013
Prediction of EEG signal by digital filtering
A Banerjee, K Basu, A Chakraborty
Proceedings of International Conference on Intelligent Systems & Networks …, 2007
72007
A Hardware Evaluation Study of NIST Post-Quantum Cryptographic Signature schemes
D Soni, K Basu, M Nabeel, R Karri
Second-PQC-Standardization-Conference, 2019
62019
Rtl level trace signal selection and coverage estimation during post-silicon validation
B Kumar, K Basu, M Fujita, V Singh
2017 IEEE International High Level Design Validation and Test Workshop …, 2017
62017
Constrained signal selection for post-silicon validation
K Basu, P Mishra, P Patra
2012 IEEE International High Level Design Validation and Test Workshop …, 2012
62012
PREEMPT: PReempting Malware by Examining Embedded Processor Traces
K Basu, R Elnaggar, K Chakrabarty, R Karri
ACM/IEEE International Conference on Design Automation Conference, 2019
52019
Fault-tolerant Systolic Array Based Accelerators for Deep Neural Network Execution
J Zhang, K Basu, S Garg
IEEE Design and Test, 2019
52019
A Novel Distributed Algorithm for Topology Management in Mobile Ad-hoc Networks
A Ray, K Basu, S Biswas, MK Naskar
International Conference on Computers and Devices for Communication 2006 …, 2006
52006
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