Arghavan Asad
Arghavan Asad
Verified email at ryerson.ca
TitleCited byYear
A fault tolerant NoC architecture for reliability improvement and latency reduction
AE Zonouz, M Seyrafi, A Asad, M Soryani, M Fathy, R Berangi
2009 12th Euromicro Conference on Digital System Design, Architectures …, 2009
242009
Optimization-based power and thermal management for dark silicon aware 3D chip multiprocessors using heterogeneous cache hierarchy
A Asad, O Ozturk, M Fathy, MR Jahed-Motlagh
Microprocessors and Microsystems 51, 76-98, 2017
92017
A Predominant Routing for on-chip networks
A Asad, M Seyrafi, AE Zonouz, M Soryani, M Fathy
2009 4th International Design and Test Workshop (IDT), 1-6, 2009
92009
A new low cost fault tolerant solution for mesh based NoCs
M Seyrafi, A Asad, AE Zonouz, R Berangi, M Fathy, M Soryani
2010 International Conference on Electronics and Information Engineering 2 …, 2010
82010
An energy-efficient heterogeneous memory architecture for future dark silicon embedded chip-multiprocessors
S Onsori, A Asad, K Raahemifar, M Fathy
arXiv preprint arXiv:1912.06576, 2019
62019
Exploiting heterogeneity in cache hierarchy in dark-silicon 3d chip multi-processors
A Asad, O Ozturk, M Fathy, MR Jahed-Motlagh
2015 Euromicro Conference on Digital System Design, 314-321, 2015
62015
Energy efficient 3D Hybrid processor-memory architecture for the dark silicon age
S Niknam, A Asad, M Fathy, AM Rahmani
2015 10th International Symposium on Reconfigurable Communication-centric …, 2015
62015
Energy aware and reliable STT-RAM based cache design for 3D embedded chip-multiprocessors
F Arezoomand, A Asad, M Fazeli, M Fathy, F Mohammadi
2017 12th International Symposium on Reconfigurable Communication-centric …, 2017
52017
An energy efficient non-uniform Last Level Cache Architecture in 3D chip-multiprocessors
P Safayenikoo, A Asad, M Fathy, F Mohammadi
2017 18th International Symposium on Quality Electronic Design (ISQED), 373-378, 2017
52017
Exploiting non-uniformity of write accesses for designing a high-endurance hybrid Last Level Cache in 3D CMPs
P Safayenikoo, A Asad, M Fathy, F Mohammadi
2017 IEEE 30th Canadian Conference on Electrical and Computer Engineering …, 2017
42017
UCA: An Energy-efficient Hybrid Uncore Architecture in 3D Chip-Multiprocessors to minimize crosstalk
P Safayenikoo, A Asad, K Raahemifar, M Fathy
Proceedings of the 9th International Workshop on Network on Chip …, 2016
32016
OptMem: dark-silicon aware low latency hybrid memory design
S Onsori, A Asad, K Raahemifar, M Fathy
2016 International Conference on VLSI Systems, Architectures, Technology and …, 2016
32016
Some enhanced cache replacement policies for reducing power in mobile devices
M Fathy, M Soryani, AE Zonouz, A Asad, M Seyrafi
2008 International Symposium on Telecommunications, 230-234, 2008
32008
A novel power model for future heterogeneous 3d chip-multiprocessors in the dark silicon age
A Asad, A Dorostkar, F Mohammadi
EURASIP Journal on Embedded Systems 2018 (1), 3, 2018
22018
Modeling and analyzing of blocking time effects on power consumption in network-on-chips
A Asad, AE Zonouz, M Seyrafi, M Soryani, M Fathy
2009 International Conference on Reconfigurable Computing and FPGAs, 290-295, 2009
22009
Optimization-based reconfigurable approach for low-power 3D chip-multiprocessors
A Dorostkar, A Asad, M Fathy, F Mohammadi
2018 IEEE 9th Latin American Symposium on Circuits & Systems (LASCAS), 1-4, 2018
12018
Optimal Placement of Heterogeneous Uncore Component in 3D Chip-Multiprocessors
A Dorostkar, A Asad, M Fathy, F Mohammadi
2017 Euromicro Conference on Digital System Design (DSD), 547-551, 2017
12017
High performance 3D CMP design with stacked hybrid memory architecture in the dark silicon era using a convex optimization model
S Onsori, A Asad, K Raahemifar, M Fathy
2016 IEEE International Symposium on Circuits and Systems (ISCAS), 2607-2610, 2016
12016
Effect of substrate temperature and Ga source precursor on growth and material properties of GaN grown by hollow cathode plasma assisted atomic layer deposition
A Haider, S Kizir, P Deminskyi, O Tsymbalenko, SA Leghari, N Biyikli, ...
2016 IEEE 36th International Conference on Electronics and Nanotechnology …, 2016
12016
Hybrid stacked memory architecture for energy efficient embedded chip-multiprocessors based on compiler directed approach
S Onsori, A Asad, O Ozturk, M Fathy
2015 Sixth International Green and Sustainable Computing Conference (IGSC), 1-7, 2015
12015
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Articles 1–20