Timothy G. Rogers
Cited by
Cited by
Cache-conscious wavefront scheduling
TG Rogers, M OConnor, TM Aamodt
2012 45th Annual IEEE/ACM International Symposium on Microarchitecture, 72-83, 2012
Divergence-aware warp scheduling
TG Rogers, M O'Connor, TM Aamodt
Proceedings of the 46th Annual IEEE/ACM International Symposium on …, 2013
Characterizing and evaluating a key-value store application on heterogeneous cpu-gpu systems
TH Hetherington, TG Rogers, L Hsu, M O'Connor, TM Aamodt
2012 IEEE International Symposium on Performance Analysis of Systems …, 2012
GPGPU-Sim 3. x manual
TM Aamodt, WWL Fung, I Singh, A El-Shafiey, J Kwa, T Hetherington, ...
2012-08-08)[2013-08-08]. http:∥ gpgpu-sim. org/manual/index. php/GPGPU …, 2012
A variable warp size architecture
TG Rogers, DR Johnson, M O'Connor, SW Keckler
ACM SIGARCH Computer Architecture News 43 (3S), 489-501, 2015
Lost in abstraction: Pitfalls of analyzing gpus at the intermediate language level
A Gutierrez, BM Beckmann, A Dutu, J Gross, M LeBeane, J Kalamatianos, ...
2018 IEEE International Symposium on High Performance Computer Architecture …, 2018
Accel-Sim: An extensible simulation framework for validated GPU modeling
M Khairy, Z Shen, TM Aamodt, TG Rogers
2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture …, 2020
Pagoda: Fine-grained GPU resource virtualization for narrow tasks
TT Yeh, A Sabne, P Sakdhnagool, R Eigenmann, TG Rogers
ACM SIGPLAN Notices 52 (8), 221-234, 2017
Analyzing machine learning workloads using a detailed GPU simulator
J Lew, DA Shah, S Pati, S Cattell, M Zhang, A Sandhupatla, C Ng, N Goli, ...
2019 IEEE International Symposium on Performance Analysis of Systems and …, 2019
General-purpose graphics processor architectures
TM Aamodt, WWL Fung, TG Rogers
Synthesis Lectures on Computer Architecture 13 (2), 1-140, 2018
A quantitative evaluation of contemporary gpu simulation methodology
A Jain, M Khairy, TG Rogers
Proceedings of the ACM on Measurement and Analysis of Computing Systems 2 (2 …, 2018
Creating SIMD efficient code by transferring register state through common memory
TG Rogers, BM Beckmann, JM O'connor
US Patent 9,354,892, 2016
D Payne, BJL Landry
Communications of the ACM 49 (11), 81, 2006
Cache-conscious thread scheduling for massively multithreaded processors
TG Rogers, M O'Connor, TM Aamodt
IEEE Micro 33 (3), 78-85, 2013
Dimensionality-aware redundant SIMT instruction elimination
TT Yeh, RN Green, TG Rogers
Proceedings of the Twenty-Fifth International Conference on Architectural …, 2020
Locality and scheduling in the massively multithreaded era
TG Rogers
University of British Columbia, 2015
Learning your limit: managing massively multithreaded caches through scheduling
TG Rogers, M O'Connor, TM Aamodt
Communications of the ACM 57 (12), 91-98, 2014
A Detailed Model for Contemporary GPU Memory Systems
M Khairy, A Jain, TM Aamodt, TG Rogers
2019 IEEE International Symposium on Performance Analysis of Systems and …, 2019
SST_GPU: An Execution-Driven CUDA Kernel Scheduler and Streaming-Multiprocessor Compute Model.
M Khairy, M Zhang, R Green, SD Hammond, RJ Hoekstra, T Rogers, ...
Sandia National Lab.(SNL-NM), Albuquerque, NM (United States), 2019
Characterizing the runtime effects of object-oriented workloads on GPUs
M Zhang, R Green, TG Rogers
2018 IEEE International Symposium on Performance Analysis of Systems and …, 2018
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