Hardware co-simulation for video processing using xilinx system generator T Saidani, D Dia, W Elhamzi, M Atri, R Tourki Proceedings of the World Congress on Engineering 1, 3-7, 2009 | 70 | 2009 |
Multi-level discrete wavelet transform architecture design D Dia, M Zeghid, T Saidani, M Atri, B Bouallegue, M Machhout, R Tourki Proceedings of the world congress on engineering 1, 1-3, 2009 | 37 | 2009 |
Real time hardware co-simulation of edge detection for video processing system Y Said, T Saidani, F Smach, M Atri 2012 16th IEEE Mediterranean Electrotechnical Conference, 852-855, 2012 | 32 | 2012 |
Embedded real-time video processing system on FPGA Y Said, T Saidani, F Smach, M Atri, H Snoussi Image and Signal Processing: 5th International Conference, ICISP 2012 …, 2012 | 26 | 2012 |
Using xilinx system generator for real time hardware co-simulation of video processing system T Saidani, M Atri, D Dia, R Tourki Electronic Engineering and Computing Technology, 227-236, 2010 | 26 | 2010 |
Lossless image compression using Burrows Wheeler Transform (methods and techniques) E Syahrul, J Dubois, V Vajnovszki, T Saidani, M Atri 2008 IEEE International Conference on Signal Image Technology and Internet …, 2008 | 22 | 2008 |
A vehicle plate recognition system based on deep learning algorithms T Saidani, YE Touati Multimedia Tools and Applications 80 (30), 36237-36248, 2021 | 17 | 2021 |
Fpga-based real-time implementation of aes algorithm for video encryption S Kotel, M Zeghid, A Baganne, T Saidani, YI Daradkeh, T Rached Recent Advances in Telecommunications, Informatics and Educational …, 2014 | 15 | 2014 |
Implementation of JPEG 2000 MQ-coder T Saidani, M Atri, R Tourki 2008 3rd International Conference on Design and Technology of Integrated …, 2008 | 15 | 2008 |
An efficient hardware implementation of parallel EBCOT algorithm for JPEG 2000 T Saidani, M Atri, L Khriji, R Tourki Journal of Real-Time Image Processing 11, 63-74, 2016 | 11 | 2016 |
FPGA-based architectures for image processing using high-level design Y Said, T Saidani, M Atri WSEAS Trans. Signal Process 11, 38-44, 2015 | 10 | 2015 |
An efficient hardware implementation of MQ decoder of the JPEG2000 L Horrigue, T Saidani, R Ghodhbani, J Dubois, J Miteran, M Atri Microprocessors and Microsystems 38 (7), 659-668, 2014 | 8 | 2014 |
Real time FPGA acceleration for discrete wavelet transform of the 5/3 filter for JPEG 2000 T Saidani, M Atri, Y Said, R Tourki 2012 6th International Conference on Sciences of Electronics, Technologies …, 2012 | 8 | 2012 |
An efficient pass-parallel architecture for embedded block coder in JPEG 2000 R Ghodhbani, T Saidani, L Horrigue, M Atri Journal of Real-Time Image Processing 16, 1595-1606, 2019 | 7 | 2019 |
GPU acceleration of image processing algorithm based on Matlab CUDA L Horrigue, R Ghodhbane, T Saidani, M Atri International Journal of Computer and Network Security 18 (6), 91-99, 2018 | 7 | 2018 |
An FPGA-based smart camera system Y Said, T Saidani, F Smach, M Atri, H Snoussi Third International IEEE Conference (IPWIS’13), 2013 | 7 | 2013 |
Fast FPGA prototyping based real-time image and video processing with high-level synthesis R Ghodhbani, L Horrigue, T Saidani, M Atri International Journal of Advanced Computer Science and Applications 11 (2), 2020 | 6 | 2020 |
High-level design for image processing on FPGA using Xilinx AccelDSP Y Said, T Saidani, M Atri 2014 World Congress on Computer Applications and Information Systems (WCCAIS …, 2014 | 6 | 2014 |
Photonics components design optimization using genetic algorithm HM Zayani, FM Bahloul, TS Saidani Optical Engineering 59 (5), 056102-056102, 2020 | 5 | 2020 |
FPGA Based Real Time Wavelet Video Coding W Elhamzi, T Saidani, Y Said, M Atri International Review on Computers and Software (I. RE. CO. S.), 2013 | 5 | 2013 |