Nazanin Calagar
Nazanin Calagar
Unknown affiliation
Verified email at
Cited by
Cited by
Source-level debugging for FPGA high-level synthesis
N Calagar, SD Brown, JH Anderson
2014 24th international conference on field programmable logic and …, 2014
From software to accelerators with LegUp high-level synthesis
A Canis, J Choi, B Fort, R Lian, Q Huang, N Calagar, M Gort, JJ Qin, ...
2013 International Conference on Compilers, Architecture and Synthesis for …, 2013
The effect of compiler optimizations on high-level synthesis-generated hardware
Q Huang, R Lian, A Canis, J Choi, R Xi, N Calagar, S Brown, J Anderson
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 8 (3), 1-26, 2015
Automating the design of processor/accelerator embedded systems with legup high-level synthesis
B Fort, A Canis, J Choi, N Calagar, R Lian, S Hadjis, YT Chen, M Hall, ...
2014 12th IEEE International Conference on Embedded and Ubiquitous Computing …, 2014
From C to Blokus Duo with LegUp high-level synthesis
JC Cai, R Lian, M Wang, A Canis, J Choi, B Fort, E Hart, E Miao, Y Zhang, ...
2013 International Conference on Field-Programmable Technology (FPT), 486-489, 2013
The system can't perform the operation now. Try again later.
Articles 1–5