| A CMOS silicon spin qubit R Maurand, X Jehl, D Kotekar-Patil, A Corna, H Bohuslavskyi, R Laviéville, ... Nature communications 7, 13575, 2016 | 594 | 2016 |
| CMOS-based cryogenic control of silicon quantum circuits X Xue, B Patra, JPG van Dijk, N Samkharadze, S Subramanian, A Corna, ... Nature 593 (7858), 205-210, 2021 | 196 | 2021 |
| Electrically driven electron spin resonance mediated by spin–valley–orbit coupling in a silicon quantum dot A Corna, L Bourdet, R Maurand, A Crippa, D Kotekar-Patil, ... npj Quantum Information 4 (1), 6, 2018 | 106 | 2018 |
| 19.1 A Scalable Cryo-CMOS 2-to-20GHz Digitally Intensive Controller for 4× 32 Frequency Multiplexed Spin Qubits/Transmons in 22nm FinFET Technology for Quantum Computers B Patra, JPG van Dijk, S Subramanian, A Corna, X Xue, C Jeon, F Sheikh, ... 2020 IEEE International Solid-State Circuits Conference-(ISSCC), 304-306, 2020 | 90 | 2020 |
| A Scalable Cryo-CMOS 2-to-20GHz Digitally-Intensive Controller for 4× 32 Frequency Multiplexed Spin Qubits/Transmons in 22-nm FinFET Technology for Quantum Computers B Patra, JPG Van Dijk, A Corna, X Xue, N Samkharadze, A Sammak, ... 2020 International Solid-State Circuits Conference, 2020 | 90* | 2020 |
| A Scalable Cryo-CMOS Controller for the Wideband Frequency-Multiplexed Control of Spin Qubits and Transmons JPG Van Dijk, B Patra, S Subramanian, X Xue, N Samkharadze, A Corna, ... IEEE Journal of Solid-State Circuits 55 (11), 2930-2946, 2020 | 88 | 2020 |
| SOI technology for quantum information processing S De Franceschi, L Hutin, R Maurand, L Bourdet, H Bohuslavskyi, ... 2016 IEEE International Electron Devices Meeting (IEDM), 13.4. 1-13.4. 4, 2016 | 48 | 2016 |
| Pauli blockade in a few-hole PMOS double quantum dot limited by spin-orbit interaction H Bohuslavskyi, D Kotekar-Patil, R Maurand, A Corna, S Barraud, ... Applied Physics Letters 109 (19), 193101, 2016 | 41 | 2016 |
| Towards scalable silicon quantum computing M Vinet, L Hutin, B Bertrand, H Bohuslavskyi, A Corna, A Amisse, ... 2018 76th Device Research Conference (DRC), 1-2, 2018 | 35 | 2018 |
| Quantum dot made in metal oxide silicon-nanowire field effect transistor working at room temperature. R Lavieville, F Triozon, S Barraud, A Corna, X Jehl, M Sanquer, J Li, ... Nano letters 15 (5), 2958-2964, 2015 | 35 | 2015 |
| Si CMOS platform for quantum information processing L Hutin, R Maurand, D Kotekar-Patil, A Corna, H Bohuslavskyi, X Jehl, ... 2016 IEEE Symposium on VLSI Technology, 1-2, 2016 | 34 | 2016 |
| Level spectrum and charge relaxation in a silicon double quantum dot probed by dual-gate reflectometry A Crippa, R Maurand, D Kotekar-Patil, A Corna, H Bohuslavskyi, AO Orlov, ... Nano Letters, 2016 | 33 | 2016 |
| All-Electrical Control of a Hybrid Electron Spin/Valley Quantum Bit in SOI CMOS Technology L Bourdet, L Hutin, B Bertrand, A Corna, H Bohuslavskyi, A Amisse, ... IEEE Transactions on Electron Devices 65 (11), 5151-5156, 2018 | 28 | 2018 |
| All-electrical control of a hybrid electron spin/valley quantum bit in SOI CMOS technology L Hutin, L Bourdet, B Bertrand, A Corna, H Bohuslavskyi, A Amisse, ... 2018 IEEE Symposium on VLSI Technology, 125-126, 2018 | 28* | 2018 |
| Pauli spin blockade in CMOS double quantum dot devices D Kotekar‐Patil, A Corna, R Maurand, A Crippa, A Orlov, S Barraud, ... physica status solidi (b) 254 (3), 2017 | 20 | 2017 |
| Development of a CMOS Route for Electron Pumps to Be Used in Quantum Metrology S Barraud, R Lavieville, L Hutin, H Bohuslavskyi, M Vinet, A Corna, ... Technologies 4 (1), 10, 2016 | 14 | 2016 |
| 350K operating silicon nanowire single electron/hole transistors scaled down to 3.4 nm diameter and 10nm gate length R Lavieville, S Barraud, A Corna, X Jehl, M Sanquer, M Vinet EUROSOI-ULIS 2015: 2015 Joint International EUROSOI Workshop and …, 2015 | 11 | 2015 |
| On-chip integration of Si/SiGe-based quantum dots and switched-capacitor circuits Y Xu, FK Unseld, A Corna, AMJ Zwerver, A Sammak, D Brousse, ... Applied Physics Letters 117 (14), 144002, 2020 | 10 | 2020 |
| Single spin control and readout in silicon coupled quantum dots A Corna Université Grenoble Alpes, 2017 | 7 | 2017 |
| Demonstration of Single Hole Transistor and Hybrid Circuits for Multivalued Logic and Memory Applications up to 350 K Using CMOS Silicon Nanowires R Lavieville, S Barraud, C Arvet, C Vizioz, A Corna, X Jehl, M Sanquer, ... Advanced Electronic Materials 2 (4), 1500244, 2016 | 5 | 2016 |
Sylvain BARRAUDCEA-LETI, Minatec CampusVerified email at cea.fr
