| A 5500-frames/s 85-GOPS/W 3-D stacked bsi vision chip based on parallel in-focal-plane acquisition and processing L Millet, S Chevobbe, C Andriamisaina, L Benaissa, E Deschaseaux, ... IEEE Journal of Solid-State Circuits 54 (4), 1096-1105, 2019 | 63 | 2019 |
| A design flow dedicated to multi-mode architectures for DSP applications C Chavet, C Andriamisaina, P Coussy, E Casseau, E Juin, P Urard, ... 2007 IEEE/ACM International Conference on Computer-Aided Design, 604-611, 2007 | 41 | 2007 |
| An efficient and flexible hardware support for accelerating synchronization operations on the sthorm many-core architecture F Thabet, Y Lhuillier, C Andriamisaina, JM Philippe, R David 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 531-534, 2013 | 23 | 2013 |
| High-level synthesis for designing multimode architectures C Andriamisaina, P Coussy, E Casseau, C Chavet IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2010 | 23 | 2010 |
| Bit-width aware high-level synthesis for digital signal processing systems B Le Gal, C Andriamisaina, E Casseau 2006 IEEE International SOC Conference, 175-178, 2006 | 19 | 2006 |
| HARS: A hardware-assisted runtime software for embedded many-core architectures Y Lhuillier, M Ojail, A Guerre, JM Philippe, KB Chehida, F Thabet, ... ACM Transactions on Embedded Computing Systems (TECS) 13 (3s), 1-25, 2014 | 17 | 2014 |
| Synthese portable pour micro-architectures a grain fin. Application aux turbo decodeurs et nanofabriques C Dezan, E Fabiani, C Gouyen, L Lagadec, B Pottier, C Andriamisaina, ... TSI-Technique et Science Informatiques 25 (7), 893-920, 2006 | 5 | 2006 |
| Hybrid prototyping methodology for rapid system validation in HW/SW co-design A Wicaksana, A Charif, C Andriamisaina, N Ventroux 2019 Conference on Design and Architectures for Signal and Image Processing …, 2019 | 4 | 2019 |
| Synthesis of Multimode digital signal processing systems E Casseau, P Coussy Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 318-325, 2007 | 4 | 2007 |
| Bit-width optimizations for high-level synthesis of digital signal processing systems C Andriamisaina, B Le Gal, E Casseau 2006 IEEE Workshop on Signal Processing Systems Design and Implementation …, 2006 | 3 | 2006 |
| Synthèse abstraite d’éléments de turbodécodeurs en bloc pour circuits reconfigurables C Andriamisaina, C Dezan, C Jego, B Pottier SympA’2005 (GDR ARP), 2005 | 3 | 2005 |
| Abstract synthesis of turbo decoder elements onto reconfigurable circuit C Andriamisaina, D Catherine, C Jego, P Bernard ERSA'05, 263-264, 2005 | 2 | 2005 |
| SECURE PLATFORM FOR ICT SYSTEMS ROOTED AT THE SILICON MANUFACTURING PROCESS C Andriamisaina, F Thabet, JR Coulon, G Chauvon, AC Aldaya, N Tuveri, ... | | 2023 |
| SESAM, un environnement global pour le prototypage de systèmes cyberphysiques A CHARIF, A WICAKSANA, SE SAIDI, T SASSOLAS, C ANDRIAMISAINA, ... Systèmes multiprocesseurs sur puce 2: Applications 2, 175, 2023 | | 2023 |
| SESAM: A Comprehensive Framework for Cyber–Physical System Prototyping T Sassolas, C Andriamisaina, A Charif Multi-Processor System-on-Chip 2: Applications, 2021 | | 2021 |
| SESAM: AVirtual Prototyping Solution to Design Multicore Architectures Andriamisaina N Ventroux, T Sassolas, A Guerre Multicore Technology, 87-130, 2018 | | 2018 |
| A 5500FPS 85GOPS/W 3D Stacked BSI Vision Chip Based on Parallel in-Focal-Plane Acquisition and Processing LM Millet L, Chevobbe S, Andriamisaina C, Beigne E, Guellec F, Dombek T ... IEEE Symposium on VLSI Circuits, Digest of Technical Papers, 245-246, 2018 | | 2018 |
| Synthèse de haut niveau tenant compte de la dynamique des traitements B Le Gal, E Casseau, C Andriamisaina Revue des Sciences et Technologies de l'Information-Série TSI: Technique et …, 2008 | | 2008 |
| Bit-Width Optimizations for High-level Synthesis of Digital Signal Processing Systems B Le Gal, C Andriamisaina, E Casseau Design of Circuits and Integrated Systems (DCIS'06), 000, 2006 | | 2006 |
| Séquenceur mémoire pour applications multimédia temps réel gérant les séquences d'accès indéterministes B Le Gal, E Casseau, C Andriamisaina, S Huet, E Martin Proceedings of GRETSI, 183-186, 2005 | | 2005 |
