| On enhanced Miller capacitance effect in interband tunnel transistors S Mookerjea, R Krishnan, S Datta, V Narayanan IEEE Electron Device Letters 30 (10), 1102-1104, 2009 | 222 | 2009 |
| Effective capacitance and drive current for tunnel FET (TFET) CV/I estimation S Mookerjea, R Krishnan, S Datta, V Narayanan IEEE Transactions on Electron Devices 56 (9), 2092-2098, 2009 | 209 | 2009 |
| Experimental demonstration of 100nm channel length In0.53Ga0.47As-based vertical inter-band tunnel field effect transistors (TFETs) for ultra low-power logic and … S Mookerjea, D Mohata, R Krishnan, J Singh, A Vallett, A Ali, T Mayer, ... 2009 IEEE international electron devices meeting (IEDM), 1-3, 2009 | 190 | 2009 |
| A novel si-tunnel fet based sram design for ultra low-power 0.3 v vdd applications J Singh, K Ramakrishnan, S Mookerjea, S Datta, N Vijaykrishnan, ... Design Automation Conference (ASP-DAC), 2010 15th Asia and South Pacific …, 2010 | 115 | 2010 |
| Toward increasing FPGA lifetime S Srinivasan, R Krishnan, P Mangalagiri, Y Xie, V Narayanan, MJ Irwin, ... IEEE Transactions on Dependable and Secure Computing 5 (2), 115-127, 2008 | 109 | 2008 |
| Modeling soft errors at the device and logic levels for combinational circuits R Ramanarayanan, VS Degalahal, R Krishnan, J Kim, V Narayanan, ... IEEE Transactions on Dependable and Secure Computing 6 (3), 202-216, 2008 | 73 | 2008 |
| Variation impact on SER of combinational circuits K Ramakrishnan, R Rajaraman, S Suresh, N Vijaykrishnan, Y Xie, ... Quality Electronic Design, 2007. ISQED'07. 8th International Symposium on …, 2007 | 57 | 2007 |
| Investigating the impact of NBTI on different power saving cache strategies A Ricketts, J Singh, K Ramakrishnan, N Vijaykrishnan, DK Pradhan Design, Automation & Test in Europe Conference & Exhibition (DATE), 2010 …, 2010 | 53 | 2010 |
| Thermal-aware reliability analysis for platform FPGAs P Mangalagiri, S Bae, R Krishnan, Y Xie, V Narayanan 2008 IEEE/ACM International Conference on Computer-Aided Design, 722-727, 2008 | 45 | 2008 |
| Hierarchical soft error estimation tool (hseet) K Ramakrishnan, R Rajaramant, N Vijaykrishnan, Y Xie, MJ Irwin, K Unlu Quality Electronic Design, 2008. ISQED 2008. 9th International Symposium on …, 2008 | 32 | 2008 |
| Impact of NBTI on FPGAs K Ramakrishnan, S Suresh, N Vijaykrishnan, MJ Irwin, V Degalahal VLSI Design, 2007. Held jointly with 6th International Conference on …, 2007 | 32 | 2007 |
| Process-variation-aware adaptive cache architecture and management M Mutyam, F Wang, R Krishnan, V Narayanan, M Kandemir, Y Xie, ... IEEE Transactions on Computers 58 (7), 865-877, 2009 | 29 | 2009 |
| Comparative analysis of NBTI effects on low power and high performance flip-flops K Ramakrishnan, X Wu, N Vijaykrishnan, Y Xie Computer Design, 2008. ICCD 2008. IEEE International Conference on, 200-205, 2008 | 28 | 2008 |
| TFET based 6T SRAM cell J Singh, R Krishnan, S Mookerjea, S Datta, V Narayanan US Patent 8,369,134, 2013 | 21 | 2013 |
| Optimizing power and performance for reliable on-chip networks A Yanamandra, S Eachempati, N Soundararajan, V Narayanan, MJ Irwin, ... 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC), 431-436, 2010 | 21 | 2010 |
| New-age: a negative bias temperature instability-estimation framework for microarchitectural components M DeBole, R Krishnan, V Balakrishnan, W Wang, H Luo, Y Wang, Y Xie, ... International Journal of Parallel Programming 37 (4), 417-431, 2009 | 21 | 2009 |
| A framework for estimating NBTI degradation of microarchitectural components M DeBole, K Ramakrishnan, V Balakrishnan, W Wang, H Luo, Y Wang, ... Design Automation Conference, 2009. ASP-DAC 2009. Asia and South Pacific …, 2009 | 19 | 2009 |
| Planar compatible FDSOI design architecture SH Dhong, JT Tzeng, KM Babaji, R Krishnan, LC Lu, TP Guo US Patent 8,443,306, 2013 | 10 | 2013 |
| E-beam lithography with alignment gating N Tseng, R Krishnan US Patent 9,269,537, 2016 | 7 | 2016 |
| A novel low area overhead body bias FPGA architecture for low power applications S Bae, K Ramakrishnan, N Vijaykrishnan 2009 IEEE Computer Society Annual Symposium on VLSI, 193-198, 2009 | 3 | 2009 |
Vijaykrishnan NarayananRobert Noll Chair Professor at The Pennsylvania State UniversityVerified email at cse.psu.edu
