Medhat Moussa
Medhat Moussa
School of Engineering, University of Guelph
Verified email at uoguelph.ca
Title
Cited by
Cited by
Year
The impact of arithmetic representation on implementing MLP-BP on FPGAs: A study
AW Savich, M Moussa, S Areibi
IEEE transactions on neural networks 18 (1), 240-252, 2007
1642007
A comparison of genetic/memetic algorithms and other heuristic search techniques
S Areibi, M Moussa, H Abdullah
INTERNATIONAL CONFERENCE ON ARTIFICIAL INTELLIGENCE (IC-AI, 2001
642001
Feasibility of floating-point arithmetic in FPGA based artificial neural networks
KR Nichols, MA Moussa, SM Areibi
In CAINE, 2002
612002
Architecture, system and method for artificial neural network implementation
M Moussa, A Savich, S Areibi
US Patent 8,103,606, 2012
452012
An experimental approach to robotic grasping using a connectionist architecture and generic grasping functions
MA Moussa, MS Kamel
IEEE Transactions on Systems, Man, and Cybernetics, Part C (Applications and …, 1998
421998
Attacking binarized neural networks
A Galloway, GW Taylor, M Moussa
arXiv preprint arXiv:1711.00449, 2017
402017
A slip detection and correction strategy for precision robot grasping
M Stachowsky, T Hummel, M Moussa, HA Abdullah
IEEE/ASME Transactions on Mechatronics 21 (5), 2214-2226, 2016
402016
Range image segmentation using local approximation of scan lines with application to CAD model acquisition
I Khalifa, M Moussa, M Kamel
Machine Vision and Applications 13 (5-6), 263-274, 2003
322003
Investigating the reliability of electrostatic comb-drive actuators utilized in microfluidic and space systems using finite element analysis
WA Moussa
The Canadian J. on Electrical and Comput. Eng. 27 (4), 195-200, 2002
312002
On the arithmetic precision for implementing back-propagation networks on FPGA: a case study
M Moussa, S Areibi, K Nichols
FPGA Implementations of Neural Networks, 37-61, 2006
292006
A hardware memetic accelerator for VLSI circuit partitioning
S Coe, S Areibi, M Moussa
Computers & Electrical Engineering 33 (4), 233-248, 2007
282007
Architecture, system and method for artificial neural network implementation
M Moussa, A Savich, S Areibi
US Patent 8,468,109, 2013
262013
A scalable pipelined architecture for real-time computation of MLP-BP neural networks
A Savich, M Moussa, S Areibi
Microprocessors and Microsystems 36 (2), 138-150, 2012
262012
Toward a natural language interface for transferring grasping skills to robots
M Ralph, MA Moussa
IEEE Transactions on Robotics 24 (2), 468-475, 2008
262008
Arithmetic formats for implementing artificial neural networks on FPGAs
X Li, M Moussa, S Areibi
Canadian Journal of Electrical and Computer Engineering 31 (1), 31-40, 2006
262006
Combining expert neural networks using reinforcement feedback for learning primitive grasping behavior
MA Moussa
IEEE transactions on Neural Networks 15 (3), 629-638, 2004
262004
Modeling grasp motor imagery through deep conditional generative models
M Veres, M Moussa, GW Taylor
IEEE Robotics and Automation Letters 2 (2), 757-764, 2017
232017
Memory efficient FPGA implementation of Hough transform for line and circle detection
A Elhossini, M Moussa
2012 25th IEEE Canadian Conference on Electrical and Computer Engineering …, 2012
212012
Batch normalization is a cause of adversarial vulnerability
A Galloway, A Golubeva, T Tanay, M Moussa, GW Taylor
arXiv preprint arXiv:1905.02161, 2019
192019
Resource efficient arithmetic effects on rbm neural network solution quality using mnist
AW Savich, M Moussa
2011 International Conference on Reconfigurable Computing and FPGAs, 35-40, 2011
192011
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