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David Danovitch
David Danovitch
Professor of Electrical and Computor Engineering, Université de Sherbrooke
Verified email at usherbrooke.ca
Title
Cited by
Cited by
Year
Optoelectronic assembly with alignment member
GR Carden, DH Danovitch, EM Foster, WW Vetter
US Patent 5,202,943, 1993
1141993
Method for building interconnect structures by injection molded solder and structures built
DG Berger, GP Brouillette, DH Danovitch, PA Gruber, RS Patel, S Roux, ...
US Patent 5,775,569, 1998
1111998
nEXO pre-conceptual design report
SA Kharusi, A Alamre, JB Albert, M Alfaris, G Anton, IJ Arnquist, ...
arXiv preprint arXiv:1805.11142, 2018
702018
Low-cost wafer bumping
PA Gruber, L Belanger, GP Brouillette, DH Danovitch, JL Landreville, ...
IBM Journal of Research and Development 49 (4.5), 621-639, 2005
672005
Bilayer wafer-level underfill
SL Buchwalter, D Danovitch, FE Doany, C Feger, PA Gruber, R Iyengar, ...
US Patent 6,924,171, 2005
662005
Silicon carrier optoelectronic packaging
PS Andry, RA Budd, B Dang, D Danovitch, BV Fasano, P Fortier, L Guerin, ...
US Patent 8,290,008, 2012
622012
Achieving mechanical and thermal stability in a multi-chip package
JA Casey, JS Corbin Jr, D Danovitch, I Depatie, VR Jadhav, RA Liptak, ...
US Patent 8,202,765, 2012
602012
Apparatus for transferring solder bumps and method of using
GD Beaumont, GP Brouillette, DH Danovitch, PA Gruber
US Patent 6,003,757, 1999
511999
Pb-free solder alloys for flip chip applications
SK Kang, J Horkans, PC Andricacos, RA Carruthers, J Cotte, M Datta, ...
1999 Proceedings. 49th Electronic Components and Technology Conference (Cat …, 1999
471999
Injection molded solder technology for Pb-free wafer bumping
PA Gruber, DY Shih, L Belanger, G Brouillette, D Danovitch, V Oberson, ...
2004 Proceedings. 54th Electronic Components and Technology Conference (IEEE …, 2004
432004
Low cost bumping process for flip chip
J Audet, L Belanger, G Brouillette, D Danovitch, V Oberson
Proc. 1995 International Flip Chip, BGA, and Ado Pkg. Symposium ITAP 95 (95 …, 1995
431995
Direct chip attach for low alpha emission interconnect system
GP Brouillette, DH Danovitch, M Liehr, WT Motsiff, JM Roldan, ...
US Patent 5,897,336, 1999
321999
Low temperature solder column attach by injection molded solder and structure formed
PA Gruber, LR Bolde, GP Brouillette, JH Covell, D Danovitch, CC Lei
US Patent 6,276,596, 2001
312001
Method for forming integrated circuit assembly
B Dang, DH Danovitch, MJ Interrante, JU Knickerbocker, MJ Shapiro
US Patent 8,689,437, 2014
302014
Interconnect for low temperature chip attachment
DG Berger, GP Brouillette, DH Danovitch, PA Gruber, BL Humphrey, ...
US Patent 6,127,735, 2000
292000
Hybrid molds for molten solder screening process
SA Cordes, DH Danovitch, PA Gruber, JL Speidell, JP Zinter
US Patent 6,832,747, 2004
282004
Hybrid molds for molten solder screening process
SA Cordes, DH Danovitch, PA Gruber, JL Speidell, JP Zinter
US Patent 6,390,439, 2002
252002
Method for building interconnect structures by injection molded solder and structures built
DG Berger, GP Brouillette, DH Danovitch, PA Gruber, RS Patel, S Roux, ...
US Patent 6,133,633, 2000
252000
Silicon carrier optoelectronic packaging
PS Andry, RA Budd, B Dang, D Danovitch, BV Fasano, P Fortier, L Guerin, ...
US Patent 8,559,474, 2013
222013
Grounding and thermal dissipation for integrated circuit packages
D Danovitch, E Duchesne
US Patent 6,819,566, 2004
222004
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