| An optimal memory allocation for application-specific multiprocessor system-on-chip S Meftali, F Gharsalli, F Rousseau, AA Jerraya Proceedings of the 14th international symposium on Systems synthesis, 19-24, 2001 | 92 | 2001 |
| Automatic generation of embedded memory wrapper for multiprocessor SoC F Gharsalli, S Meftali, F Rousseau, AA Jerraya Proceedings of the 39th annual Design Automation Conference, 596-601, 2002 | 60 | 2002 |
| Fast and standalone design space exploration for high-level synthesis under resource constraints A Prost-Boucle, O Muller, F Rousseau Journal of Systems Architecture 60 (1), 79-93, 2014 | 51 | 2014 |
| Embedded software design and programming of multiprocessor system-on-chip K Popovici, A A Jerraya, M Wolf | 44 | 2010 |
| Platform-based software design flow for heterogeneous MPSoC K Popovici, X Guerin, F Rousseau, PS Paolucci, AA Jerraya ACM Transactions on Embedded Computing Systems (TECS) 7 (4), 1-23, 2008 | 41 | 2008 |
| A codesign experiment in acoustic echo cancellation: Gmdfα L Freund, M Israël, F Rousseau, JM Bergé, M Auguin, C Belleudy, ... ACM Transactions on Design Automation of Electronic Systems (TODAES) 2 (4 …, 1997 | 30 | 1997 |
| Generating efficient context-switch capable circuits through autonomous design flow A Bourge, O Muller, F Rousseau ACM Transactions on Reconfigurable Technology and Systems (TRETS) 10 (1), 1-23, 2016 | 29 | 2016 |
| Towards a multi-formalism framework for architectural synthesis: The ASAR project P Asar Third International Workshop on Hardware/Software Codesign, 25-32, 1994 | 22 | 1994 |
| Dynamic many-process applications on many-tile embedded systems and HPC clusters: The EURETILE programming environment and execution platforms PS Paolucci, A Biagioni, LG Murillo, F Rousseau, L Schor, L Tosoratto, ... Journal of Systems Architecture 69, 29-53, 2016 | 21 | 2016 |
| A fast and autonomous HLS methodology for hardware accelerator generation under resource constraints A Prost-Boucle, O Muller, F Rousseau 2013 Euromicro Conference on Digital System Design, 201-208, 2013 | 21 | 2013 |
| Unifying memory and processor wrapper architecture in multiprocessor soc design F Gharsalli, D Lyonnard, S Meftali, F Rousseau, AA Jerraya Proceedings of the 15th international symposium on System Synthesis, 26-31, 2002 | 20 | 2002 |
| Interface optimization during hardware-software partitioning L Freund, D Dupont, M Israel, F Rousseau Proceedings of 5th International Workshop on Hardware/Software Co Design …, 1997 | 20 | 1997 |
| Efficient software development platforms for multimedia applications at different abstraction levels K Popovici, X Guerin, F Rousseau, PS Paolucci, A Jerraya 18th IEEE/IFIP International Workshop on Rapid System Prototyping (RSP'07 …, 2007 | 18 | 2007 |
| Prototyping multiprocessor system-on-chip applications: a platform-based approach B Senouci, A Bouchhima, F Rousseau, F Petrot, A Jerraya IEEE Distributed Systems Online 8 (5), 2-2, 2007 | 17 | 2007 |
| Fast Prototyping of POSIX Based Applications on a Multiprocessor SoC Architecture:" Hardware-Dependent Software Oriented Approach" B Senouci, A Bouchhima, F Rousseau, F Petrot, A Jerraya Seventeenth IEEE International Workshop on Rapid System Prototyping (RSP'06 …, 2006 | 17 | 2006 |
| Service dependency graph: an efficient model for hardware/software interfaces modeling and generation for SoC design A Sarmento, L Kriaa, A Grasset, MW Youssef, A Bouchhima, F Rousseau, ... Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware …, 2005 | 17 | 2005 |
| Multi-CPU/FPGA platform based heterogeneous multiprocessor prototyping: New challenges for embedded software designers B Senouci, F Rousseau, F Petrot 2008 The 19th IEEE/IFIP International Symposium on Rapid System Prototyping …, 2008 | 16 | 2008 |
| Flexible application software generation for heterogeneous multi-processor system-on-chip X Guerin, K Popovici, W Youssef, F Rousseau, A Jerraya 31st Annual International Computer Software and Applications Conference …, 2007 | 16 | 2007 |
| ECOS A Generic Codesign Environment for the Prototyping of Real Time Applications “From Formal Specifications to Hardware-Software Partitioning” M Aiguier, J Benzakki, G Bernot, S Beroff, D Dupont, L Freund, M Israel, ... Hardware/Software Co-Design and Co-Verification, 23-57, 1997 | 16 | 1997 |
| Adaptation of Force-Directed scheduling algorithm for hardware/software partitioning F Rousseau, J Benzakki, JM Berge, M Israel Proceedings Sixth IEEE International Workshop on Rapid System Prototyping …, 1995 | 16 | 1995 |
Ahmed JerrayaCEA techVerified email at cea.fr
