| Accelerating assertion coverage with adaptive testbenches B Pal, A Banerjee, A Sinha, P Dasgupta IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2008 | 19 | 2008 |
| Test generation games from formal specifications A Banerjee, B Pal, S Das, A Kumar, P Dasgupta Proceedings of the 43rd annual Design Automation Conference, 827-832, 2006 | 18 | 2006 |
| Method and apparatus for extracting assume properties from a constrained random test-bench K De, E Cerny, P Dasgupta, B Pal, PP Chakrabarti US Patent 7,797,123, 2010 | 15 | 2010 |
| Design intent coverage revisited A Sinha, P Dasgupta, B Pal, S Das, P Basu, PP Chakrabarti ACM Transactions on Design Automation of Electronic Systems (TODAES) 14 (1 …, 2009 | 9 | 2009 |
| H-DBUG: A High-level Debugging Framework for Protocol Verification using Assertions A Nandi, B Pal, N Chhetan, P Dasgupta, PP Chakrabarti 2005 Annual IEEE India Conference-Indicon, 115-118, 2005 | 6 | 2005 |
| Assertion based verification: have I written enough properties? A Banerjee, B Pal, C Kamarapu, P Dasgupta, PP Chakrabarti, M Jha Proceedings of the IEEE INDICON 2004. First India Annual Conference, 2004 …, 2004 | 5 | 2004 |
| The BUSpec platform for automated generation of verification aids for standard bus protocols B Pal, A Banerjee, P Dasgupta, PP Chakrabarti Proceedings. Second ACM and IEEE International Conference on Formal Methods …, 2004 | 5 | 2004 |
| Hardware accelerated constrained random test generation B Pal, A Sinha, P Dasgupta, PP Chakrabarti, K De IET Computers & Digital Techniques 1 (4), 423-433, 2007 | 3 | 2007 |
| BUSpec: A framework for generation of verification aids for standard bus protocol specifications B Pal, A Banerjee, P Dasgupta, PP Chakrabarti Integration 40 (3), 285-304, 2007 | 2 | 2007 |
| Formal and Semi-Formal Verification Methods with Constrained Random Testbenches B Pal IIT Kharagpur, 2009 | | 2009 |
| Property Driven Test Generation in Absence of Direct Interface B Pal, P Dasgupta, PP Chakrabarti 2006 Annual IEEE India Conference, 1-6, 2006 | | 2006 |
| H-DBUG: A High-level Debugging Framework for Protocol Verification using Assertions B Pal, N Chhetan, P Dasgupta, PP Chakrabarti, A Nandi IEEE, 2006 | | 2006 |
| Interactive Test-Bench Synthesis for Assertion-Based Verification A Banerjee, S Chakravorty, B Pal, P Dasgupta 2005 Annual IEEE India Conference-Indicon, 317-321, 2005 | | 2005 |
| List of sub-reviewers A Singh, A Joshi, A Patra, A Chakrabarti, A Vishnoi, A Sundar-Dhar, ... | | |
