| A mips system simulator simmips for education and research of computer science N Fujieda IPSJ Journal 50 (11), 2665, 2009 | 23* | 2009 |
| An analysis of DCM-based true random number generator N Fujieda, M Takeda, S Ichikawa IEEE Transactions on Circuits and Systems II: Express Briefs 67 (6), 1109-1113, 2019 | 21 | 2019 |
| On the feasibility of TERO-based true random number generator on Xilinx FPGAs N Fujieda 2020 30th International Conference on Field-Programmable Logic and …, 2020 | 17 | 2020 |
| A latch-latch composition of metastability-based true random number generator for Xilinx FPGAs N Fujieda, S Ichikawa IEICE Electronics Express 15 (10), 20180386-20180386, 2018 | 14 | 2018 |
| SimMips: A MIPS system simulator N Fujieda, T Miyoshi, K Kise Proc. WCAE, 32-39, 2009 | 13 | 2009 |
| Evaluation of the hardwired sequence control system generated by high-level synthesis N Fujieda, S Ichikawa, Y Ishigaki, T Tanaka 2017 IEEE 26th International Symposium on Industrial Electronics (ISIE …, 2017 | 12 | 2017 |
| A true random number generator that utilizes thermal noise in a programmable system‐on‐chip (PSoC) S Matsuoka, S Ichikawa, N Fujieda International Journal of Circuit Theory and Applications 49 (10), 3354-3367, 2021 | 10 | 2021 |
| Attenuation Model for Error Correction of Ultrasonic Positioning System N Fujieda, T Shinohara, S Ichikawa, Y Sakaguchi, S Matsuoka, ... IEEJ Journal of Industry Applications 7 (2), 181-188, 2018 | 8 | 2018 |
| メニーコアアーキテクチャ研究のためのスケーラブルな HW 評価環境 ScalableCore システム 高前田伸也， 渡邉伸平， 姜軒， 藤枝直輝， 植原昂， 三好健文， 吉瀬謙二 研究報告計算機アーキテクチャ (ARC) 2009 (3), 1-10, 2009 | 8 | 2009 |
| Request density aware fair memory scheduling T Ikeda, S Takamaeda-Yamazaki, N Fujieda, S Sato, K Kise 3rd JILP Workshop on Computer Architecture Competitions: Memory Scheduling …, 2012 | 7 | 2012 |
| ScalableCore system: A scalable many-core simulator by employing over 100 FPGAs S Takamaeda-Yamazaki, S Sano, Y Sakaguchi, N Fujieda, K Kise Reconfigurable Computing: Architectures, Tools and Applications: 8th …, 2012 | 7 | 2012 |
| Design trade-offs in SHA-3 multi-message hashing on FPGAs Y Ayuzawa, N Fujieda, S Ichikawa TENCON 2014-2014 IEEE Region 10 Conference, 1-5, 2014 | 6 | 2014 |
| MIPS システムシミュレータ SimMips を活用した組込みシステム開発の検討 渡邉伸平， 藤枝直輝， 若杉祐太， 高前田伸也， 森洋介， 吉瀬謙二 情報処理学会研究報告組込みシステム (EMB) 2008 (116 (2008-EMB-010)), 23-28, 2008 | 6 | 2008 |
| Development of Real-time Positioning System by ultrasonic waves S Matsuoka, N Fujieda, S Ichikawa, H Kawaguchi Journal of the Japan Society of Applied Electromagnetics and Mechanics 23 (2 …, 2015 | 5 | 2015 |
| 超音波を用いたリアルタイム位置測位システムの開発 松岡俊佑， 藤枝直輝， 市川周一， 川口秀樹 日本 AEM 学会誌 23 (2), 380-385, 2015 | 5 | 2015 |
| Determination of optimal parameters for bilateral filter for medical images A Yoza, C Yamada, K Miyagi, S Ichikawa, N Fujieda IEEJ Transactions on Electronics, Information and Systems 139 (9), 1008-1014, 2019 | 4 | 2019 |
| 分布間距離を用いた Bilateral Filter の準最適パラメータ探索 真喜志泰希， 市川周一， 藤枝直輝， 山田親稔 電気学会論文誌 D (産業応用部門誌) 137 (7), 576-582, 2017 | 4* | 2017 |
| A virtual cache for overlapped memory accesses of path ORAM N Fujieda, R Yamauchi, H Fujita, S Ichikawa International Journal of Networking and Computing 7 (2), 106-123, 2017 | 4 | 2017 |
| Last path caching: A simple way to remove redundant memory accesses of path ORAM N Fujieda, R Yamauchi, S Ichikawa 2016 Fourth International Symposium on Computing and Networking (CANDAR …, 2016 | 4 | 2016 |
| 極めて低コストで効率的な VDEC チップ試作・検証システムの開発と応用 若杉祐太， 佐藤真平， 植原昂， 藤枝直輝， 渡邉伸平， 高前田伸也， 森洋介， ... 研究報告システムソフトウェアとオペレーティング・システム (OS) 2009 (6), 1-8, 2009 | 4 | 2009 |
Kise KenjiTokyo Institute of TechnologyVerified email at cs.titech.ac.jp
